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| HT8955A Voice Echo Features * * * * Operating voltage: 5.0V Long delay time - 0.8 seconds (SEL=VSS, 256K DRAM) - 0.2 seconds (SEL=VDD/open, 64K DRAM) 25kHz sampling rate Continuous variable delay time * * * * * * Built-in pre-amplifier Low distortion High S/N ratio Wide frequency response PCM 10-bit A/D and D/A converters 24-pin DIP package Applications * * Mixers Karaoke systems * * Echo generators Sound effect generators General Description The HT8955A is a CMOS LSI digital audio signal delay processor. It is designed for audio system applications including echo generators, karaoke systems, sound effect generators, etc. The chip consists of a built-in pre-amplifier, on-chip oscillator, DRAM interface, 10-bit A/D and D/A converters as well as control logic. It provides continuously adjustable delay time up to 0.8/0.2 seconds at a sampling rate of 25kHz when combined with an external DRAM (41256/4164). The HT8955A is superior to a conventional BBD delay unit in its low distortion, high S/N ratio and long delay time. Its sophisticated low pass filter will not end in the normal applications due to the high sampling rate (25~50kHz). Hence, the HT8955A is excellent for audio delay system applications. It is offered in a 24-pin dual-in-line package. Pin Assignment Block Diagram 1 5th May '98 HT8955A Pad Coordinates Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Chip size: 2170 x 2200 (m)2 * The IC substrate should be connected to VSS in the PCB layout artwork. Unit: m X -1138.00 -1141.00 -1136.50 -1136.50 -1137.00 -1149.00 -854.50 -548.00 -198.50 111.50 461.00 773.00 1122.50 Y 796.50 523.50 201.50 -163.00 -507.00 -774.00 -853.50 -831.50 -831.50 -831.50 -831.50 -831.50 -831.50 Pad No. 14 15 16 17 18 19 20 21 21 22 23 25 X 1141.50 1141.50 1141.50 1141.50 1141.50 896.00 645.00 435.00 335.00 150.00 -35.00 -264.00 Y -547.00 -197.50 111.50 461.00 770.50 811.00 810.50 794.00 794.00 779.00 779.00 806.00 Pin Description Pin No. Pin Name I/O 1 2 3 4 5 6 7 8 9 10 11 12 BIAS IN PREO OUT SEL OSC1 OSC2 OSC3 OSC4 VSS A6 A7 O I O O I I O I O I O O Internal Connection OP Non-inverted OP Inverted OP OUTPUT -- Pull-High -- -- -- -- -- CMOS OUT CMOS OUT Description Internal pre-amplifier bias Connects to a decoupling capacitor Audio signal input pin (inverted) Pre-amplifier output pin Delayed audio signal output pin DRAM type selection: VDD or Open: 64Kb VSS: 256Kb System oscillator input System oscillator output Delay time control oscillator input Delay time control oscillator output Negative power supply (GND) Connects to DRAM A6 Connects to DRAM A7 2 5th May '98 HT8955A Internal Connection CMOS OUT CMOS OUT CMOS OUT CMOS OUT CMOS OUT CMOS OUT CMOS OUT CMOS OUT CMOS I/O CMOS I/O CMOS I/O -- Pin No. Pin Name I/O 13 14 15 16 17 18 19 20 21 22 23 24 A5 A4 A3 A2 A1 A0 RASB WRB DATA A8 CASB VDD O O O O O O O O I/O O O I Description Connects to DRAM A5 Connects to DRAM A4 Connects to DRAM A3 Connects to DRAM A2 Connects to DRAM A1 Connects to DRAM A0 Connects to DRAM RASB Connects to DRAM WRB Data I/O pin Connects to DRAM A8 Connects to DRAM CASB Positive power supply Absolute Maximum Ratings* Supply Voltage ................................. -0.3V to 6V Input Voltage................. VSS-0.3V to VDD+0.3V Storage Temperature................. -50C to 125C Operating Temperature............... -20C to 70C *Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maximum Ratings" may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Electrical Characteristics Symbol VDD IOP AV AV VIL (Ta=25C) Parameter Operating Voltage Operating Current Pre-amplifier Voltage Gain Comparator Voltage Gain "L" Input Voltage -- 5V 5V 5V -- Test Conditions VDD Conditions -- No load, fOSC=640kHz RL>100k Open loop RL>100k Open loop -- Min. 4.5 -- -- -- 0 Typ. 5.0 2.5 2000 2000 -- Max. 5.5 8 -- -- 0.3VDD Unit V mA V/V V/V V 3 5th May '98 HT8955A Test Conditions VDD VIH VOMAX Td Maximum Delay Time Td S/N THD Signal to Noise Ratio Total Harmonic Distortion 5V 5V 5V "H" Input Voltage Maximum Output Voltage -- 5V 5V Symbol Parameter Min. 0.7VDD 1 0.15 0.6 -- -- Typ. -- 1.5 0.2 0.8 55 0.5 Max. VDD -- -- -- -- -- Unit V V s s dB % Conditions -- RL>470k SEL=open, 25kHz sampling rate SEL=VSS, 25kHz sampling rate VO=1V, 400Hz BW=10kHz VO=1V, 400Hz BW=7kHz Functional Description The HT8955A is a single chip LSI with an external DRAM. It is designed for processing audio signal delay. The chip includes a built-in preamplifier, 10-bit A/D and D/A converters. The A/D and D/A converters ensure low distortion as well as high S/N ratio of the audio delay system. The chip also provides two sets of oscillation circuit for system sampling rate and audio echo delay time. Playing function block diagram demands an external resistor between the OSC3 and OSC4 pins. By altering the oscillation resistor, its delay time can be continuously adjusted up to 0.8/0.2 seconds at a 25kHz sampling rate for DRAM of 256Kb/64Kb. DRAM selection The HT8955A can interface with a DRAM for storing delay signals. The type along with the maximum delay time of DRAM is determined by the status of the SEL pin as shown: System oscillator SEL Connection VDD or Open VSS DRAM Type 64Kb 256Kb Delay Time 0.2 seconds 0.8 seconds The HT8955A provides two oscillators, one for the sampling rate and one for echo delay time. The sampling rate oscillator requires an external resistor between the OSC1 and OSC2 pins. A higher sampling rate (25~50kHz) can thus be derived by adjusting the oscillation resistor without having a sophisticated low pass filter. The delay time oscillator, on the other hand, 4 5th May '98 HT8955A Application Circuits Low cost echo 5 5th May '98 HT8955A Basic KARAOKE system 6 5th May '98 HT8955A Basic KARAOKE system with pre-emphasis 7 5th May '98 |
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